preliminary notice: this is not a final specification. some parametric limits are subject to change. m6mgd13vw66cwg - p renesas lsis rev.0.1.48a_bezb 1 134,217,728 - bit (8,388,608 - word by 16 - bit) cmos flash memory & 67,108,864 - bit (4,194,304 - word by 16 - bit) cmos mobile ram stacked - csp ( chip scale package) the m6mgd13vw66cwg - p is a stacked chip scale package (s - csp) that contents 128m - bit flash memory and 64m - bit mobile ram in a 72 - pin stacked csp with leaded solder ball. 128m - bit flash memory is a 8,388,608 words, single power supply and high performance non - volatile memory fabricated by cmos technology for the peripheral circuit and dinor iv (divided bit - line nor iv) architecture for the memory cell. all memory blocks are locked and can not be programmed or erased, when f - wp# is low. using software lock release function, program or erase operation can be executed. 64m - bit mobile ram is a 4,194,304 words high density ram fabricated by cmos technology for the peripheral circuit and dram cell for the memory array. the interface is compatible to an asynchronous sram. the cells are automatically refreshed and the refresh control is not required for system. the device also has the partial block refresh scheme and the power down mode by writing the command. the m6mgd13vw66cwg - p is suitable for a high performance cellular phone and a mobile pc that are required to be small mounting area, weight and small power dissipation. access time random access/ page access flash 70ns /25ns (max.) mobile ram 85ns /25ns (max.) supply voltage f/m - vcc=2.7 ~ 3.0v ambient temperature ta= - 40 ~ 85 degree package 72pin s - csp, ball pitch 0.80mm outer - ball: sn - pb application mobile communication products a0 - a21 : common address for flash/mobile ram dq0 - dq15 : data i/o f - ce2# : flash chip enable 2 m - ce# : mobile ram chip enable m - we# : write enable for mobile ram f - wp # : write protect for flash m - lb# : lower byte control for mobile ram f - rp # : reset power down for flash m - ub # : upper byte control for mobile ram f - oe# : output enable for flash memory description features f - vcc : vcc for flash gnd : gnd for flash / mobile ram m - oe# : output enable for mobile ram f - we# : write enable for flash memory f - ry/by# : flash memory ready /busy nc : non connection pin configuration (top view) 10.8 mm dq15 f - ry/by# gnd f - vcc f - oe# gnd f - ce1# dq1 dq3 dq5 dq7 dq14 dq4 dq2 dq0 a1 a0 a2 a3 a6 dq8 dq9 dq11 dq10 dq12 dq6 dq13 a9 a14 a13 a12 f - rp# a4 a7 a10 a15 a5 a8 a11 du du f - we# gnd f - wp# m - lb# du du ( top view) 1 2 3 4 5 6 7 8 a b c d e f g h j k l m 8.5 mm a18 a17 a16 a19 m - ub# index(laser marking) a20 f - ce2# f - ce1# : flash chip enable 1 nc du : don ? t use nc nc m - oe# du du du du nc m - we# du du m - ce# du du du a21 m - vcc : vcc for mobile ram m - vcc
preliminary notice: this is not a final specification. some parametric limits are subject to change. m6mgd13vw66cwg - p renesas lsis rev.0.1.48a_bezb 2 134,217,728 - bit (8,388,608 - word by 16 - bit) cmos flash memory & 67,108,864 - bit (4,194,304 - word by 16 - bit) cmos mobile ram stacked - csp ( chip scale package) capacitance mcp block diagram min. typ. max. cout output capacitance dq15-dq0, f-ry/by# 34 pf unit limits parameter input capacitance a21-a0, f-oe#, f-we#, f-ce1#, f-ce2#, f-wp#, f-rp#, m-oe#, m-we#, m-ce#, m-lb#, m-ub# 26 pf symbol conditions ta=25c, f=1mhz, vin=vout=0v cin a0 to a21 f-wp# f-rp# m-we# m-oe# m-ub# m-lb# dq0 to dq15 128mbit dinor iv flash memory 64mbit mobile ram f-vcc gnd f-ce1# f-ce2# a0 to a21 m-ce# f-oe# f-we# a0 to a21 m-vcc f - ry/by# note: in the 128m - bit dinor(iv) flash memory lower 64mbit is selected by f - ce1#= ? l ? and upper 64mbit is done by f - ce2#= ? l ? . never select each chip at the same time. in the data sheet there are ? vcc ? s which mean ? f - vcc ? and ? m - vcc ? (each vcc for flash / mobile ram). in the flash memory part they mean oe# and we# are f - oe# and f - we#. in the mobile ram part ub# , lb#, oe# and we# are m - ub# , m - lb#, m - oe# and m - we#, respectively.
these materials are intended as a reference to assist our custom ers in the selection of the renesas technology corporation product best suited to the customer's ap plication; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas technology corporation or a third party. renesas technology corporation assumes no responsibility for any damage , or infringement of any third - party's rights, originating in the use of any product data, diag rams, charts, programs, algorithms, or circuit application examples contained in these materials. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents infor mation on products at the time of publication of these materials , and are subject to change by renesas technology corporation without notice due to product improvemen ts or other reasons. it is therefore recommended that customers contact renesas technology corporation or an authorized renesas technology corporation product distributor for the latest product informati on before purchasing a product listed herein. the information described here may contain technical inaccuracie s or typographical errors. renesas technology corporation assumes no responsibility for any damage , liability, or other loss rising from these inaccuracies or err ors. please also pay attention to information published by renesas technology corporation by various means, including the renesas technology corporation semiconductor home page ( http://www.renesas.com ). when using any or all of the information contained in these mate rials, including product data, diagrams, charts, programs, and a lgorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corporation assumes no responsibility for any damage , liability or other loss resulting from the information contain ed herein. renesas technology corporation semiconductors are not designed or manuf actured for use in a device or system that is used under circums tances in which human life is potentially at stake. please conta ct renesas technology corporation or an authorized renesas technology corporation product distributor when considering the use of a product contained herein for any specific purposes, su ch as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. the prior written approval of renesas technology corporation is necessary to reprint or reproduce in whole or in part these materials. if these products or technologies are subject to the japanese ex port control restrictions, they must be exported under a license from the japanese government and cannot be imported into a coun try other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan an d/or the country of destination is prohibited. please contact renesas technology corporation for further details on these materials o r the products contained therein. renesas technology corporation puts the maximum effort into making semi conductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage.remember to give due co nsideration to safety when making your circuit designs, with app ropriate measures such as (i) placement of substitutive, auxilia ry circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials keep safety first in your circuit designs! rej03c0173 ? 2003 renesas technology corp. new publication, effective april 2003. specifications subject to change without notice nippon bldg.,6 - 2, otemachi 2 - chome, chiyoda - ku ,tokyo,100 - 0004 japan preliminary notice: this is not a final specification. some parametric limits are subject to change. renesas lsis m6mgd13vw66cwg - p 134,217,728 - bit (8,388,608 - word by 16 - bit) cmos flash memory & 67,108,864 - bit (4,194,304 - word by 16 - bit) cmos mobile ram stacked - csp ( chip scale package)
|
